50 lines
1.4 KiB
C
50 lines
1.4 KiB
C
#include <stdint.h>
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#if CPUINFO_MOCK
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extern uint32_t cpuinfo_arm_fpsid;
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extern uint32_t cpuinfo_arm_mvfr0;
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extern uint32_t cpuinfo_arm_wcid;
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static inline uint32_t read_fpsid(void) {
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return cpuinfo_arm_fpsid;
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}
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static inline uint32_t read_mvfr0(void) {
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return cpuinfo_arm_mvfr0;
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}
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static inline uint32_t read_wcid(void) {
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return cpuinfo_arm_wcid;
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}
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#else
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#if !defined(__ARM_ARCH_7A__) && !defined(__ARM_ARCH_8A__) && !(defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
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/*
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* CoProcessor 10 is inaccessible from user mode since ARMv7,
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* and clang refuses to compile inline assembly when targeting ARMv7+
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*/
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static inline uint32_t read_fpsid(void) {
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uint32_t fpsid;
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__asm__ __volatile__("MRC p10, 0x7, %[fpsid], cr0, cr0, 0" : [fpsid] "=r"(fpsid));
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return fpsid;
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}
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static inline uint32_t read_mvfr0(void) {
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uint32_t mvfr0;
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__asm__ __volatile__("MRC p10, 0x7, %[mvfr0], cr7, cr0, 0" : [mvfr0] "=r"(mvfr0));
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return mvfr0;
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}
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#endif
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#if !defined(__ARM_ARCH_8A__) && !(defined(__ARM_ARCH) && (__ARM_ARCH >= 8))
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/*
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* In ARMv8, AArch32 state supports only conceptual coprocessors CP10, CP11,
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* CP14, and CP15. AArch64 does not support the concept of coprocessors. and
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* clang refuses to compile inline assembly when targeting ARMv8+
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*/
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static inline uint32_t read_wcid(void) {
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uint32_t wcid;
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__asm__ __volatile__("MRC p1, 0, %[wcid], c0, c0" : [wcid] "=r"(wcid));
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return wcid;
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}
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#endif
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#endif
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